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BLOCK CLOCK MINI GENERATOR

USB3.0 microcontroller boot source (Flash memory or USB), 0.05” pitch jumper or 0402 0R resistor. USB3.0 (IC6) microcontroller’s debugging pin header, 0.05” pitch USB3.0 microcontroller (IC13) crystal/clock frequency selection (FSLC) resistors. Default mode: SPI boot, On Failure - USB Boot USB3.0 microcontroller (IC13) boot configuration (PMODE0) resistors. Default mode: Active Serial Standard configuration I☬ port expander with 4 push-pull outputs and 4 inputs, MAX7322ATE+Ĭonfiguration, Status and Setup ComponentsįPGA (IC31) MSEL. SPI to I☬ bridge, SC18IS602BIPW (not mounted) Board components Featured Devicesįield programmable RF transceiver, LMS7002MĬypress FX3 Super Speed USB 3rd generation controller, CYUSB3014 LimeSDR-USB 1v4 Development Board Connectorsīoard components description listed in the Table 1 and Table 2. There are three connector types – data and debugging (USB3.0, FPGA GPIO and JTAG), power (DC jack and external supply pinheader) and high frequency (RF and reference clock).įigure 3. LimeSDR-USB board version 1.4 picture with highlighted major connections presented in Figure 3.

BLOCK CLOCK MINI GENERATOR

Programmable clock generator for the FPGA reference clock input or LMS PLLs.

Possibility to lock VCTCXO to external clock or tune VCTCXO by onboard DAC.

30.72MHz VCTCXO (precision: ☑ ppm initial, ±4 ppm stable).

FPGA and FX3 JTAG connectors (0.05” pitch).

microUSB3.0 (type B) connector or USB3.0 (type A) plug.

2 x 128K (16K x 8) EEPROMs for LMS MCU firmware, LMS MCU data.

Possibility to update FPGA gateware by using FX3 (USB).

Cyclone IV EP4CE40F23C8N device in 484-pin FPGA.

Cypress FX3 Super Speed USB 3rd generation controller.

LimeSDR-USB 1v4s – USB type A connector board